Which memory type is suitable for your server platform — RDIMMs vs UDIMMs
In the past decade, server processor core counts have dramatically leapt from 12 cores per socket to 96, and most recently, 128 cores per socket. However, memory bandwidth scaled slower than core growth.Thankfully, DDR5 has arrived.
With DDR5’s data transfer speeds of 4.8 to 8.4 GT/s, it delivers over 50% more bandwidth than DDR4’s maximum 1.6 to 3.2 GT/s to enable high-speed transfers of massive data volumes. By providing more bandwidth-per-core as well as higher capacities, DDR5 enables servers in data centers to process more data faster and to deliver optimal performance for data-intensive applications and workloads, such as artificial intelligence (AI), machine learning (ML), 5G, and the Internet of Things (IoT).While speed is the most talked-about enhancement of DDR5 over DDR4, a lot more has changed. Which new features can servers benefit most from, and which memory type is appropriate for server platforms?
DDR5 Enhancements Over DDR4
The following table provides an overview of DDR5 improvements compared with DDR4.
Server Platforms Supporting RDIMMs: Can You Also Use UDIMMs?
In previous DDR generations (DDR3 and DDR4), server platforms that could accommodate Unbuffered DIMMs (UDIMMs) also supported Registered DIMMs (RDIMMs), and vice versa. In DDR5 server platforms, however, RDIMMs and UDIMMs are no longer pin-compatible. They are keyed differently, so you cannot insert UDIMMs on server motherboards that support RDIMMs.
Intel® Xeon®, the lineup of Intel® Core™ Processors, and the AMD EPYC™ Processor Family will support DDR5 ECC RDIMMs.
Two Channels on One DIMM
DDR5 has a new channel architecture consisting of two sets of independent 32-bit sub-channels.
Compared with DDR4’s 72-bit channel architecture (64 data + 8 ECC), DDR5’s new 80-bit channel architecture is comprised of two 32-data bits + 8 ECC. While the total number of data bits is the same, the new architecture adds eight channel bits for ECC as wells as shortens access latency, improves channel efficiency, and improves overall performance.
RCD: UDIMM vs RDIMM
UDIMMs do not have a registering clock driver or RCD. The RCD is found only on RDIMMs.
A registered clock driver (RCD) chip, or simply known as a “register,” is a critical component of RDIMMs. Its main function is to first receive the instructions or commands from the CPU before sending them to the memory modules. The RCD serves as a “mediator” between the CPU and the DIMM — the data signal stays on the RCD for one clock cycle, and then transfers from the RCD to the DIMM on the rising edge of the next clock signal. This results in instructions taking one CPU cycle longer, but the buffering reduces the strain on the CPU’s memory controller and helps reduce impact on signal integrity.
The main purpose of the RCD is to maintain the same memory speed even in heavy workloads. In contrast to speed-driven applications like gaming, enterprise systems and server applications require sustained performance as well as the high capacity and extra reliability features made possible by the RCD on DDR4 memory modules.
RCD is not present on the DDR5 UDIMM:
PMIC: Power Delivery Component on the DIMM
One of the main differences between DDR4 and DDR5 is power. The former runs at 1.2V while the latter runs at 1.1V.
What is not often explained, however, is that on consumer/client systems, 5V input voltage is supplied while in servers, it’s 12V. This is converted to 1.1V for the module.
Power distribution is managed by an onboard power management IC (PMIC) to provide more consistent and reliable power. With PMIC, DDR5 has moved power management from the motherboard to the DIMM itself, which means there is now an extra component on DDR5 modules.
Supporting out-of-band communication between components is a Serial Presence Detect (SPD) hub, which is used with two high-precision temperature sensors on either side of the DIMM. These sensors provide detailed memory temperature information to prevent overheating, which can affect system stability.
On-Die ECC
On-die ECC ensures higher reliability and reduces defect rates, it is not the same as “traditional” ECC. As memory cells become denser, they become more vulnerable to bit flips. This leads to cells holding less charge. On‑die ECC is a way of managing the bit flips so more cells pass the validation method during the production or manufacturing stage. This allows more cells to reach JEDEC-required specifications.
It provides protection for data on the die but not for data in transit or data that is being moved to/from the memory module and the CPU/GPU. It does not provide protection against errors happening outside the chip, such as those that occur on the memory module and memory controller that is in the CPU.
Conclusion
DDR5 enhancements over the previous DDR generation will definitely relieve the bandwidth bottlenecks as the growth of massive data processing continues unabated. The adoption of DDR5 technology in high-performance servers will meet current and future needs as memory keeps up with the acceleration of processor core technologies.
Targeted for servers processing demanding data center applications, DDR5 enables high-performance computing, real-time data analytics, and other data-intensive applications.
With RDIMMs no longer pin-compatible with UDIMMs, choosing the right server platform also requires choosing the right memory type.
ATP Electronics offers DDR5 solutions designed and built for the exacting demands of your enterprise. For more information on ATP’s DDR5 memory modules, visit the ATP website or contact an ATP Representative
